2020spring_FPGA and CPLD Practice_Department of Electrical Engineering 1 A
Course Period：Now ~ Any Time
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Course Intro

Course Plan

教學目標：
  • Verilog語法
  • Qurtus安裝
  • CH1
  • Lab1
  • CH2
  • LAB2
  • CH3
  • CH4
  • LAB4
  • CH5
  • Lab5
  • CH6
  • LAB6
  • CH7
  • LAB7
  • de2_115_schematic
Teacher / 陳瓊安

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